this post was submitted on 01 Jul 2026
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I don't know how that even got past the brainfart stage. AFAIK nobody has actually demonstrated how that would really work.
Not saying this won't ever be a thing. But not in the lifetime of anybody on earth right now I don't think.
There is an unsolvable compute problem. The average PC on earth has multiple bit-flips a year from cosmic rays. The space hardened chips we use are 50nm and the chips used from inference are 4 to 6nm. 50nm is far more cosmic ray resistant than 6nm because of the transistor size. Are we supposed to think making H100s with a 65nm process is possible? The speed of light creates a die size limitation as well.
Either that or they'd have to triplicate everything and have a voting system.
this is the current real solution on the ISS - three main computers doing everything.
They are not using 6nm process chips in the ISS. The computers themselves were made before that process existed. An off-the-shelf space hardened computer system uses 65nm process. Cosmic rays is a very general term, it covers basically everything that flies around in space, that includes sources like the sun, which is hammering everything in the solar system with rays. Outside of the atomsphere there are so many more cosmic rays that non-space hardened computers can not even make calculations. Combined with the difference between the bit flip rate when you make transistors 10 x smaller is also fucked up high. One CPU cycle will have enough erros to make the computer useless. It's a multi-faceted problem and when the largest limiting factor is weight & size, it can't be solved with scaling.
How would that even work with inference where the expected output will be different between 3 runs with the same input?